This course introduces the concepts of System on Chip Design Verification with emphasis on Functional Verification flows and methodologies. The course also teaches how to code in System Verilog language - which is the most popular Hardware Description Language used for SOC design and verification in semiconductor industry. The course is organised into multiple sections and each uses short video lectures to explain the concepts. After every few other lectures -lab exercises are provided and students will be guided to practically code, simulate and verify using a free browser based Simulator and Waveform viewer. Quizzes are also added to test the students knowledge and progress.
Experienced Verification Engineer with 16+ years of experience, Intel Alumni, passionate in continuous learning and knowledge sharing ()
Co-Author of the book "" - A Golden reference guide for VLSI engineers at all experience level
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